architecture, a bus is a subsystem that transfers data between
computer components inside a
Early computer buses were literally parallel
electrical buses with multiple connections, but the term is now used for any
physical arrangement that provides the same logical functionality as a parallel
electrical bus. Modern computer buses can use both parallel and bit-serial
connections, and can be wired in either a multidrop (electrical parallel) or
daisy chain topology, or connected by switched hubs, as in the case of USB.
Early computer buses were bundles of wire that attached memory and
peripherals. They were named after electrical buses, or busbars. Almost always, there was one bus for memory,
and another for peripherals, and these were accessed by separate instructions, with
completely different timings and protocols.
One of the first complications was the use of interrupts. Early computer
programs performed I/O by waiting in a loop for the peripheral to become ready. This was a waste of
time for programs that had other tasks to do. Also, if the program attempted to
perform those other tasks, it might take too long for the program to check
again, resulting in loss of data. Engineers thus arranged for the peripherals to
interrupt the CPU. The interrupts had to be prioritized, because the CPU can
only execute code for one peripheral at a time, and some devices are more
time-critical than others.
Later computer programs began to share memory common to several CPUs. Access
to this memory bus had to be prioritized, as well.
The classic, simple way to prioritize interrupts or bus access was with a
DEC noted that having two buses seemed wasteful and expensive for
mapped peripherals into the memory bus, so that the devices appeared to be
Earlymicrocomputer bus systems were essentially a passive backplane connected
directly or through buffer amplifiers to the pins of the CPU. Memory and other
devices would be added to the bus using the same address and data pins as the
CPU itself used, connected in parallel. Communication was controlled by the CPU,
which had read and written data from the devices as if they are blocks of
memory, using the same instructions, all timed by a central clock controlling
the speed of the CPU. Still, devices interrupted the CPU by signaling on
separate CPU pins. For instance, a disk drive controller would signal the CPU
that new data was ready to be read, at which point the CPU would move the data
by reading the "memory location" that corresponded to the disk drive. Almost all
early microcomputers were built in this fashion, starting with the S-100 bus in
In some instances, most notably in the
IBM PC, although similar physical architecture is employed, instructions to
access peripherals (in and out) and memory (mov
and others) have not been made uniform at all, and still generate distinct CPU
signals, that could be used to implement a separate I/O bus.
These simple bus systems had a serious drawback when used for general-purpose
computers. All the equipment on the bus has to talk at the same speed, as it
shares a single clock.
Increasing the speed of the CPU becomes harder, because the speed of all the
devices must increase as well. When it is not practical or economical to have
all devices as fast as the CPU, the CPU must either enter a
or work at a slower clock frequency temporarily,
to talk to other devices in the computer. While acceptable in
embedded systems, this problem was not tolerated for long in
general-purpose, user-expandable computers.
Such bus systems are also difficult to configure when constructed from common
off-the-shelf equipment. Typically each added
expansion card requires many
jumpers in order to set memory addresses, I/O addresses, interrupt
priorities, and interrupt numbers.
A bus controller accepted data from the CPU side to be moved to the
peripherals side, thus shifting the communications protocol burden from the CPU
itself. This allowed the CPU and memory side to evolve separately from the
device bus, or just "bus". Devices on the bus could talk to each other with no
CPU intervention. This led to much better "real world" performance, but also
required the cards to be much more complex. These buses also often addressed
speed issues by being "bigger" in terms of the size of the data path, moving
parallel buses in the first generation, to 16 or 32-bit in the second, as
well as adding software setup (now standardized as
Plug-n-play) to supplant or replace the jumpers.
However these newer systems shared one quality with their earlier cousins, in
that everyone on the bus had to talk at the same speed. While the CPU was now
isolated and could increase speed without fear, CPUs and memory continued to
increase in speed much faster than the buses they talked to. The result was that
the bus speeds were now very much slower than what a modern system needed, and
the machines were left starved for data. A particularly common example of this
problem was that video cards quickly outran even the newer bus systems like PCI,
and computers began to include AGP just to drive the video card. By 2004 AGP was
outgrown again by high-end video cards and is being replaced with the new PCI
An increasing number of external devices started employing their own bus
systems as well. When disk drives were first introduced, they would be added to
the machine with a card plugged into the bus, which is why computers have so
many slots on the bus. But through the 1980s and 1990s, new systems like
IDE were introduced to serve this need, leaving most slots in modern systems
empty. Today there are likely to be about five different buses in the typical
machine, supporting various devices.
"Third generation" buses have been emerging into the market since about 2001,
including HyperTransport and InfiniBand. They also tend to be very flexible in
terms of their physical connections, allowing them to be used both as internal
buses, as well as connecting different machines together. This can lead to
complex problems when trying to service different requests, so much of the work
on these systems concerns software design, as opposed to the hardware itself. In general, these third generation
buses tend to look more like a network than the original concept of a bus, with a higher protocol overhead
needed than early systems, while also allowing multiple devices to use the bus
Buses such as Wishbone have been developed by the open source hardware
movement in an attempt to further remove legal/patenting constraints from
Description of a bus
At one time, "bus" meant an electrically parallel system, with electrical
conductors similar or identical to the pins on the CPU. This is no longer the
case, and modern systems are blurring the lines between buses and networks.
Buses can be
parallel buses, which carry data words in parallel on multiple wires, or serial
buses, which carry data in bit-serial form. The addition of extra power and
control connections, differential drivers, and data connections in each
direction usually means that most serial buses have more conductors than the
minimum of one used in the 1-Wire serial bus. As data rates increase, the
problems of timing skew, power consumption, electromagnetic interference and
crosstalk across parallel buses become more and more difficult to circumvent.
One partial solution to this problem has been to double pump the bus. Often, a
serial bus can actually be operated at higher overall data rates than a parallel
bus, despite having fewer electrical connections, because a serial bus
inherently has no timing skew or crosstalk. USB, FireWire, and Serial ATA are
examples of this. Multidrop connections do not work well for fast serial buses,
so most modern serial buses use daisy-chain or hub designs.
Most computers have both internal and external buses. An internal bus
connects all the internal components of a computer to the motherboard (and thus,
internal memory). These types of buses are also referred to as a
because they are intended to connect to local devices, not to those in other
machines or external to the computer. An external bus connects external
peripherals to the motherboard.
Network connections such asEthernet
are not generally regarded as buses, although the difference is largely
conceptual rather than practical. The arrival of technologies such as InfiniBand
and HyperTransport is further blurring the boundaries between networks and
buses. Even the lines between internal and external are sometimes fuzzy, I˛C can
be used as both an internal bus, or an external bus (where it is known as
ACCESS.bus), and InfiniBand is intended to replace both internal buses like PCI
as well as external ones like Fibre Channel. In the typical desktop application,
serves as a peripheral bus, but it also sees some use as a networking utility
and for connectivity between different computers, again blurring the conceptual
In a network, the master scheduler controls the data traffic. If data is to
be transferred, the requesting computer sends a message to the scheduler, which
puts the request into a queue. The message contains an identification code which
is broadcast to all nodes of the network. The scheduler works out priorities and
notifies the receiver as soon as the bus is available.
The identified node takes the message and performs the data transfer between
the two computers. Having completed the data transfer the bus becomes free for
the next request in the scheduler's queue.
Advantage: Any computer can be accessed directly and messages can be
sent in a relatively simple and fast way.
Disadvantage: A scheduler is required to organize the traffic by
assigning frequencies and priorities to each signal.
Examples of internal computer buses
ASUS Media Bus proprietary, used on some
Socket 7 motherboards
CAMAC for instrumentation systems
Extended ISA or EISA
Industry Standard Architecture or ISA
Low Pin Count or LPC
MicroChannel or MCA
Multibus for industrial systems
OPTi local bus used on early
Intel 80486 motherboards.
bus or IEEE 696, used in the
VESA Local Bus or VLB or VL-bus
the VERSAmodule Eurocard bus
STD Bus for 8- and 16-bit microprocessor systems
a proprietary bus developed by
Digital Equipment Corporation for their
proprietary bus developed by Digital Equipment Corporation for their
PDP and later
PCI Express or PCIe
Serial Peripheral Interface Bus or SPI bus
Self repairableelastic interface buses have recently been invented by IBM.
IBM has filed a patent application on these buses which is undergoing peer
review on Peer to Patent. The public commentary period closed on July 24,
2008. The IBM invention provides a spare net which the system switches to in the event
that an alternate net doesn't function.
Examples of external computer buses
Advanced Technology Attachment or ATA (aka PATA, IDE, EIDE, ATAPI, etc.)
disk/tape peripheral attachment bus
(the original ATA is parallel, but see also the recent